Short, plain definitions of the terms project owners, engineers and investors meet when planning ingot, wafer, cell and chip manufacturing in India. Each one links to a full guide with named sources.
An MNRE framework in India that lists approved solar manufacturers and products. List-I covers modules, List-II covers solar cells (in force from 1 June 2026) and List-III is proposed for ingots and wafers from 1 June 2028.
A separate ALMM list of modules that do not use List-II cells. It can be used only by projects that must use ALMM modules but are exempt from the cell requirement.
MNRE's Approved List of Models and Manufacturers for solar PV cells. From 1 June 2026, modules on ALMM List-I must be made with cells from List-II manufacturers, making domestic cells mandatory for covered projects.
The proposed ALMM list for solar ingots and wafers in India, with an effective date of 1 June 2028. It extends domestic-manufacturing requirements upstream from cells to the wafer stage.
The mechanism under which bids submitted after a specified cut-off date must use ALMM List-III-compliant wafers, while separate lists are kept for grandfathered projects that use non-enlisted wafers or cells.
An extra customs duty on imports found to be sold below fair value and harming domestic industry. In India, DGTR investigates and recommends the duty, and the finance ministry notifies it.
The back-end semiconductor process steps that turn finished wafers into packaged, tested chips. Indian policy often uses it together with OSAT as "ATMP/OSAT".
A solar cell architecture that moves all electrical contacts to the rear of the wafer, removing front-side shading. The family includes IBC, TBC (TOPCon-based) and HBC (heterojunction-based) cells, and it asks for high-lifetime wafers.
Light-induced degradation caused by boron-oxygen defects that form in boron-doped Czochralski silicon under illumination. It scales with oxygen content and is one reason the industry moved to n-type and gallium-doped wafers.
A squared block of silicon cut from a round ingot before wafering. Squaring, grinding and edge finishing of the brick affect both wafer geometry and wafer strength.
The production line that turns silicon wafers into solar cells through texturing, junction formation, passivation, metallisation and testing. Its process route sets what it requires from incoming wafers.
A classification of air cleanliness by the number of airborne particles per cubic metre at given sizes, from ISO 1 to ISO 9. It measures the air, not contamination on the wafer surface.
A variant of Czochralski crystal growth in which polysilicon and dopant are fed into the melt while the ingot is being pulled, keeping the melt level nearly constant. It aims to give more uniform resistivity along the ingot.
The furnace that grows a single-crystal silicon ingot from molten silicon by the Czochralski method. MCG, CZ crystal grower, monocrystal furnace and ingot puller are overlapping commercial names for this equipment.
A magnetic field made by two coils carrying current in opposite directions, roughly symmetrical about the crystal's pulling axis. In MCz growth it is used to control melt flow and oxygen incorporation.
The method of growing monocrystalline silicon by dipping a seed crystal into molten silicon in a quartz crucible and slowly pulling it upward while rotating. It is the dominant route for solar and semiconductor silicon ingots.
An Indian requirement that certain solar schemes use domestically manufactured cells and modules. It interacts with ALMM and signals demand for upstream domestic ingot and wafer capacity.
The wafering step that releases sliced wafers from the mounting beam after cutting, usually in a heated water-based bath, before singulation and cleaning.
The standard method for slicing silicon ingots into wafers, using a fine steel or tungsten-core wire coated with diamond abrasive. It replaced slurry sawing and cuts with less kerf and saw damage.
A reactor in which small silicon seed particles are suspended in a rising gas stream while silicon from a gas such as silane deposits on them, growing them into granules.
Processes that move harmful metal impurities away from the active region of a silicon wafer, either internally to oxygen precipitates or externally to a diffused layer such as a phosphorus emitter.
High-purity polysilicon made as small, free-flowing beads in a fluidized bed reactor rather than as rods that must be crushed. It can be metered through a feeder, which suits recharge and continuous Czochralski growth.
The assembly of graphite heaters, crucible supports, susceptors and insulation inside a crystal-growth furnace. It controls the thermal field and is a recurring consumable.
A solar cell that combines crystalline silicon with thin amorphous silicon layers, processed at low temperature. It typically uses thinner wafers and low-temperature metallisation pastes.
Natural quartz refined to less than 100 ppm of total impurities (about 99.99% pure), as defined by the US Geological Survey. It is the raw material for the fused-quartz crucibles used to grow silicon ingots.
A large single crystal of silicon grown in a crystal puller. It is cropped, squared into bricks and sliced into wafers.
A plant or group that makes more than one stage of the solar value chain itself, such as cells and modules, or wafers, cells and modules. Fully integrated plants start further upstream, at ingots, wafers or polysilicon.
The International Technology Roadmap for Photovoltaic, an annual industry roadmap that tracks and forecasts wafer thickness, cell technology shares, silver use and other manufacturing trends.
The silicon lost as fine powder in the cutting fluid when an ingot is sliced into wafers. It is a manufacturing-stage silicon loss, separate from end-of-life module waste.
A degradation mechanism in silicon solar cells that appears under light and heat, linked to hydrogen and cell processing. It can affect several wafer types and recovers only over long periods.
A variant of Czochralski crystal growth in which a magnetic field is applied to the molten silicon to damp or reshape convection. It gives the grower more control over how much oxygen from the quartz crucible ends up in the ingot.
The cell-line step that forms electrical contacts on a solar cell, usually by screen-printing silver-based pastes and firing or curing them. Copper and plating routes are on the roadmap.
How long excess charge carriers survive in silicon before recombining. It is a key wafer-quality measure, and high-efficiency cell architectures need high lifetime.
The materials that make up a solar module besides the cells, such as front solar glass, encapsulant films, a backsheet or rear glass, an aluminium frame and a junction box.
Silicon in which the whole crystal has a single, continuous lattice orientation, grown by the Czochralski method for solar and semiconductor wafers.
A silicon wafer doped (typically with phosphorus) so that electrons are the majority carriers. N-type wafers underpin TOPCon, HJT and back-contact cells.
Manufacturing capacity that is installed and producing qualified output, as opposed to capacity that has only been announced, approved or placed under construction. In India's ingot and wafer stage the two differ widely.
A business model in which a third party assembles, packages and tests chips for semiconductor companies. ATMP names the process steps; OSAT names who performs them.
Clusters that form when oxygen dissolved in Czochralski silicon comes out of solution during heat treatment. They can getter metals but can also reduce lifetime and show up only after cell processing.
MNRE's ₹24,000 crore incentive scheme for high-efficiency solar PV modules in India. It pays sales-linked incentives for five years after commissioning to manufacturers that build fully or partially integrated plants.
A polyolefin elastomer film that bonds and seals solar cells inside a module. It is more moisture-resistant than EVA and does not release acetic acid, so it is widely used in glass-glass and n-type modules.
High-purity polycrystalline silicon, the feedstock melted in crystal pullers to grow ingots. It is the first stage of the crystalline silicon solar value chain.
The high-purity fused-silica vessel that holds molten silicon during Czochralski growth. It is a consumable and the main source of oxygen in Cz silicon.
A Czochralski practice in which the crucible is refilled with polysilicon between ingots without cooling or opening the furnace, so several ingots can be grown from one hot cycle.
Used manufacturing equipment that has been inspected, repaired or reconditioned for resale. Its value depends on condition evidence, process fit and support terms.
A wafer's resistance to current, set by its doping level and measured in ohm-centimetres. Cell architectures specify resistivity windows, and it varies along an ingot.
The cracked, stressed surface layer that slicing leaves on a wafer. It weakens the wafer and is removed by etching on the customer's cell line.
The ratio of a dopant's concentration in the solid crystal to its concentration in the melt it grows from. Values below one, such as phosphorus at about 0.3, make the dopant build up in the melt and shift resistivity along a batch-grown ingot.
The established polysilicon route in which heated silicon cores in a reactor are coated with silicon from trichlorosilane reduced by hydrogen. The resulting rods are broken into chunks for crucible loading.
A wafer of silicon carbide used for power electronics. SiC crystals are grown by sublimation (physical vapour transport) rather than pulled from a melt.
The step that separates individual wafers from the sliced stack after degluing, before final cleaning, drying and inspection.
The five stages of crystalline silicon solar manufacturing: polysilicon, ingot, wafer, cell and module. India's capacity is concentrated at the module and cell end.
Electrically active oxygen clusters that form in Czochralski silicon at moderate temperatures and shift resistivity. High-temperature processing dissolves them.
Fracture of silicon wafers during handling, processing or transport, driven by surface and edge flaws that concentrate stress. It rises as wafers get thinner under the same handling loads.
The leading n-type solar cell architecture, which uses an ultra-thin oxide and doped polysilicon layer to passivate the rear contact. It is a family of process flows rather than a single recipe.
The difference between the thickest and thinnest points of a wafer. It is a core geometry specification in wafer acceptance.
The highest grades of high-purity quartz, with less than 10 ppm of total impurities (about 99.999% pure), used where trace contamination must be kept to a minimum.
A thin slice of crystalline silicon cut from an ingot, used as the base of solar cells and semiconductor chips. Solar wafers are around 130 µm thick for TOPCon.
Measurement of wafer properties such as thickness, geometry, cracks, saw marks, resistivity and lifetime, usually in-line with automated sorting.
The recurring inputs of a wafering line, including diamond wire, cutting fluid, mounting adhesive and cleaning chemistry. They are best bought through qualification rather than price comparison.
Begin with the requirement, not a catalogue.